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9151AINDCO07/09
ATA8742
13.5   Register Description
13.5.1
EEARH  EEPROM Address Register
"  Bits 7..1  Res: Reserved Bits
These bits are reserved bits in the ATtiny24/44/84 and will always read as zero.
"  Bit 0  EEAR8: EEPROM Address
The EEPROM Address Register  EEARH  specifies the most significant bit for EEPROM
address in the 512 bytes EEPROM space for Tiny84. This bit is reserved bit in the ATtiny24/44
and will always read as zero. The initial value of EEAR is undefined. A proper value must be
written before the EEPROM may be accessed.
13.5.2
EEARL  EEPROM Address Register
"  Bits 7..0  EEAR7..0: EEPROM Address
The EEPROM Address Register  EEARL  specifies the EEPROM address. In the 128 bytes
EEPROM space in ATiny24 bit 7 is reserved and always read as zero. The EEPROM data bytes
are addressed linearly between 0 and 128/256/512. The initial value of EEAR is undefined. A
proper value must be written before the EEPROM may be accessed.
13.5.3
EEDR  EEPROM Data Register
"  Bits 7..0  EEDR7..0: EEPROM Data
For the EEPROM write operation the EEDR Register contains the data to be written to the
EEPROM in the address given by the EEAR Register. For the EEPROM read operation, the
EEDR contains the data read out from the EEPROM at the address given by EEAR.
13.5.4
EECR  EEPROM Control Register
Bit
7
6
5
4
3
2
1
0
0x1F (0x3F)







EEAR8
EEARH
Read/Write
R
R
R
R
R
R
R
R/W
Initial Value
0
0
0
0
0
0
0
X
Bit
7
6
5
4
3
2
1
0
0x1E (0x3E)
EEAR7
EEAR6
EEAR5
EEAR4
EEAR3
EEAR2
EEAR1
EEAR0
EEARL
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial Value
X
X
X
X
X
X
X
X
Bit
7
6
5
4
3
2
1
0
0x1D (0x3D)
EEDR7
EEDR6
EEDR5
EEDR4
EEDR3
EEDR2
EEDR1
EEDR0
EEDR
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial Value
0
0
0
0
0
0
0
0
Bit
7
6
5
4
3
2
1
0
0x1C (0x3C)


EEPM1
EEPM0
EERIE
EEMPE
EEPE
EERE
EECR
Read/Write
R
R
R/W
R/W
R/W
R/W
R/W
R/W
Initial Value
0
0
X
X
0
0
X
0
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